By dotCore
via mechanical-sympathy.blogspot.com.ar
Submitted: Jan 28 2013 / 02:31
In a previous article I reported what appeared to be a performance issue with CAS/LOCK instructions on the Sandy Bridge microarchitecture compared to the previous Nehalem microarchitecture. Since then I've worked with the good people of Intel to understand what was going on and I'm now pleased to be able to shine some light on the previous results.
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